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Low Power Hall Switch
TLE 4917
Features
* Micro power design * 2.4 V to 5.5 V battery operation * High sensitivity and high stability of the
magnetic switching points * High resistance to mechanical stress * Digital output signal * Switching for both poles of a magnet (omnipolar) * Programming pin for the switching direction of the output Functional Description The TLE 4917 is an Integrated Hall-Effect Sensor designed specifically to meet the requirements of low-power devices. eg as an On/Off switch in Cellular Flip-Phones,with battery operating voltages of 2.4V - 5.5V. Precise magnetic switching points and high temperature stability are achieved through the unique design of the internal circuit. An onboard clock scheme is used to reduce the average operating current of the IC. During the operate phase the IC compares the actual magnetic field detected with the internally compensated switching points. The output Q is switched at the end of each operating phase. During the Stand-by phase the output stage is latched and the current consumtion of the device reduced to some A. The IC switching behaviour is omnipolar, i.e. it can be switched on with either the North or South pole of a magnet. The PRG pin can be connected to VS which holds the output VQ at a High level for B=0mT; conversely the output VQ can be inverted by connecting the PRG pin to Gnd, which will hold the output VQ at a Low level for B=0mT. In this later case the presence of an adequate magnetic field will cause the output VQ to switch to a High level ( ie off state ). Type TLE 4917 Marking 17s Ordering Code Q62705K 605 Package P-TSOP6-6-2
P-TSOP6-6-2
Data Sheet
1
Pin Configuration (top view)
Top View PRG GND GND month year
1
17 2
GND
ym
Sensitive Area
S
6
5
4 3
VS
Q
AEP02801_C
Figure 1
Pin Definitions and Functions Pin 1 2 3 4 5 6 Symbol
VS
GND Q GND GND PRG
Function Supply Voltage Ground Open Drain Input Ground Ground Programming Input
Data Sheet
2
VS
1 Bias and Compensation Circuits
Active Error Compensation
Oscillator & Sequencer
Threshold Generator 2, 4, 5 GND
Hall Probe
Comparator with Hysteresis Decision Latch Logic Chopped Amplifier 6 PRG 3 Q
AEB02800_C
Figure 2 Block Diagram
Circuit Description The Low Power Hall IC Switch comprises a Hall probe, bias generator, compensation circuits, oscillator, output latch and an n-channel open drain output transistor. The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the temperature behavior and reduce technology variations. The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall probe caused by moulding and soldering processes and other thermal stresses in the package. This chopper technique together with the threshold generator and the comparator ensures high accurate magnetic switching points. Very low power consumption is achieved with a timing scheme controlled by an oscillator and a sequencer. This circuitry activates the sensor for 50 s (typical operating time) sets the output state after sequential questioning of the switchpoints and latches it with the beginning of the following standby phase (typ. 130 ms). In the standby phase the average current is reduced to typical 3.5 A. Because of the long standby time compared to the operating time the overall averaged current is only slightly higher than the standby current. By connecting the programming pin to GND (normal to VS) the Output State can be inverted to further reduce the current consumption in applications where a high magnetic field is the
Data Sheet 3
normal state. In that case the output Q is off at high magnetic fields and no current is flowing in the open drain transistor. The output transistor can sink up to 1 mA with a maximal saturation voltage UQSAT. Absolute Maximum Ratings Parameter Supply Voltage Supply Current Output Voltage Output Current Programming Pin Voltage Junction temperature Storage temperature Magnetic Flux Density Thermal Resistance P-TSOP6-6-2
1)
Symbol
VS IS VQ IQ VPRG Tj TS
B
Rth JA
Limit Values min. max. - 0.3 5.5 -1 2.5 - 0.3 5.5 -1 2 - 0.3 5.5 1) - 40 150 - 40 150 - unlimited - 35
Unit V mA V mA V C C mT K/W
Notes
VPRG must not exceed Vs by more than 0.3V
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD Protection Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and Mil. Std. 883D method 3015.7 Parameter ESD Voltage Symbol Limit Values Min. max. 2 Unit kV Notes
UESD
R = 1.5 , C = 100 pF; T = 25 C
Data Sheet
4
Operating Range Parameter Symbol Limit Values Min. typ. max. 2.4 2.7 5.5 - 0.3 2.7 5.5 - 0.3 0 0.3 Unit V V V Notes
1)
Supply voltage VS Output voltage VQ Programming Pin Voltage VPRG
Ambient Temperature
1)
TA
VS - 0.3 - 40
VS
25
VS +
0.3 85 C
Inverted output state Standard output state
A Ceramic Bypass Capacitor of 10 nF at VS to GND is highly recommended.
AC/DC Characteristics Parameter Averaged Supply Current Averaged Supply Current during Operating Time Transient Peak Supply Current during Operating Time Supply Current during Standby Time Output Saturation Voltage Output Leakage Current Output Rise Time Output Fall Time Operating Time Standby Time Duty Cycle Start-up Time of IC
1) 2)
Symbol
ISAVG ISOPAVG ISOPT ISSTB UQSAT IQLEAK tr tf top tstb top / tstb tstu
Limit Values Min. typ. Max. 1 4 20 0.5 1.1 2.5
Unit A mA
Notes
-
-
2.5
mA
t < 100 ns
1 - - - - 15 - - -
3.5 0.13 0.01 0.3 0.1 50 130 0.039 6
20 0.4 1 1 1 93 1) 240 3) - 12
A V A s s s ms % s
IQ = 1 mA RL = 2.7 k; CL = 10 pF RL = 2.7 k; CL = 10 pF
2)
4)
for VS=3.5V the max. operating time top max = 85s includes the Start-up Time tstu 3) for VS=3.5V the max. Standby Time tstb max = 220ms 4) initial power on time
Data Sheet
5
Magnetic Characteristics Parameter Operate Points Release Points Hysteresis
1)
Symbol BOPS BOPN BRPS BRPN BHY
Limit Values min. typ. max. 3.5 5 7 -7 -5 - 3.5 2.2 4 6 -6 -4 - 2.2 0.2 1 2
Unit mT mT mT mT mT
Notes
1)
1)
Positive magnetic fields are related to the approach of a magnetic south pole to the branded side of package
Note: The listed AC/DC and magnetic characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not other specified, typical characteristics apply at Tj = 25 C and VS = 2.7 V.
Data Sheet
6
IS ISOPAVG
Operating Time
ISAVG ISSTB
Standby Time
top
50 s
tstb
130 ms Latch Output
t
AET02802-17
Figure 3 Timing Diagram
Figure 4 Programming of Output with the PRG Pin
Data Sheet
7
Magnetic Switching Points versus Temperature (Vs=2.7V)
Magnetic Switching Points versus Supply Voltage Us (Ta=20C)
B[mT]
6 B OPS 4 B RPS
B[mT]
6 BOPS 4 B RPS
2
2
0
0
-2
-2
-4
BRPN B
OPN
-4
B RPN BOPN
-6 -40 -20 0 20 40 60 80 100
-6 2.5 3 3.5 4 4.5 5 5.5 6
T [C]
U S[V]
Supply current ISOPAVG during Operating Time versus Temperature (Vs=2.7V)
2.5
Supply current ISOPAVG during Operating Time versus Supply Voltage Us (Ta=20C)
2.5
I [mA]
I [mA]
2
2
1.5
1.5
ISOPA V G
1
I SOPA V G 1
0.5
0.5 -40
0
-20 0 20 40 60 80 100
2.5
3
3.5
4
4.5
5
5.5
6
T [C]
US [V]
Data Sheet
8
ISSTB
Supply current ISSTB during Standby Time versus Temperature (Vs=2.7V)
20
Supply current ISSTB during Standby Time versus Supply Voltage Us (Ta=20C)
20
I [A]
18 16 14 12 10 8 6 ISSTB 4 2 0 -40
I [A]
18 16 14 12 10 8 6 4 2 0 -20 0 20 40 60 80 100 2.5 3 3.5 4 4.5 5 5.5 6
ISSTB
T [C]
US [V]
Output Saturation voltage UQSAT versus Temperature ( IQ=1mA )
200
Standby Time tstb versus Temperature (Vs = 2.7V)
180
U[mV]
180 160 140 120 100 80 60 U QSA T
t [ms]
170
160
150
140
130
120
40 20 0 -40
tstb
110
-20
0
20
40
60
80
100
100 -40
-20
0
20
40
60
80
100
T [C]
T [C ]
Data Sheet
9
Top View 654
Marking on P-TSOP6-6-2 package corresponds to pin 1 of device
17
123 Direction of Unreeling
ym
S
Package P-TSOP6-6-2
Pieces / Reel 3.000
Reel 180 mm
Figure 5 Marking and Tape Loading Orientation
Figure 6 Foot Print Reflow Soldering
Data Sheet
10
Package Dimensions
P-TSOP6-6-2 (Plastic Thin Small Outline-Package)
weight : 0.015g coplanary : 0.1mm
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device
Dimensions in mm
Data Sheet 11
Information about the application circuit of the TLE 4917
Vs
Sensor
1 Vs
6 Prg S1
RL=2700 Output C= 10 nF
TLE 4917
2 Gnd 5 Gnd
3Q
4 Gnd
Gnd
Application circuit TLE 4917
The minimum value for the pull up resistor can be calculated with the power supply voltage Vs, the maximum current IQmax and the minimum output saturation voltage UQSAT.
Example: for Vs = 3 V: RLmin = (Vs - UQSATmin)/IQmax = (3 V - 0,1 V)/0,002 A = 1435
Larger values for RL will reduce the current IQ and therefore the power consumption. If the resistor RL is very large (>100 kOhm) a capacitor (app. 10pF) between Output and Gnd pin could be useful if capacitive coupled noise occurs. The load at the output Q should have a large input resistance to reduce the current trough RL and the power consumption. The TLE 4917 has 3 ground pins. From a mechanical point of view all ground pins should be connected to ground. Shortest wires should be used to avoid ground loops. If there is a need to reduce the number of used ground-pins any ground-pin combination may me used. Furthermore it is possible using only one ground-pin at the application, all pins are equivalent. The capacitor C is highly recommended to reduce noise on the power supply voltage and it will improve the EMI/EMC performance. Furthermore it decreases the transient peak supply current during operation time. The IC toggles between low and high current consumption. This behaviour might produce additional noise at the power supply. The capacitor will reduce this noise. Furthermore this capacitor is used to supply the sensor if microbreaks were (short loss of supply voltage) to occur. Shortest connection wires between IC and capacitor should be used to avoid noise. The switch S1 shows the programming feature of the output.
Example: If the PRG-pin is connected to Vs the IC will hold the output Q at a high voltage level for B= 0 mT in this circuit. A magnetic field larger than the operating point will switch the output to low level. In typical applications the PRG-pin is connected directly to Vs or to Gnd depending on the technical needs. Avoid using a floating PRG-pin.
Data Sheet
12
TLE 4917 Revision History: 2001-07-09 Previous Version: Page Subjects (major changes since last revision)
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com
Edition 2001-03-05 Published by Infineon Technologies AG St.-Martin-Strasse 53 D-81541 Munchen (c) Infineon Technologies AG 2000 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologiesis an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
13

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